5. PCB Design GuidelinesHexotica - The Design and Implementation of a Small Walking Robot
Once the schematic is complete, the physical layout of the circuit must be designed. This can be done in a number of different ways, such as purchasing prototyping boards or implementing the circuit on a breadboard. By far the most reliable method however is to print the circuit connections onto a printed circuit board manufactured professionally. This method is very expensive for low quantities, but nothing else compares to the speed and reliability of the assembly process.
A printed circuit board works by routing traces between IC pins and other devices on routing layers. Most PCB’s will have at least two routing layers; one on the top and one on the bottom. Connections between routing layers are made using "vias". Via holes look like regular pin-holes but are typically smaller in diameter.
In order to create printed circuit boards, you must first have software capable of generating the artwork files used in the industry. Generally, this means creating GERBER files. All of the circuit schematics and PCB layouts were created using OrCAD Design Desktop software, however a number of different packages are available including some shareware and freeware available on the Internet. For a good discussion of available programs, see the information maintained by AP Circuits on their web-site at http://www.apcircuits.com.
The PCB files that were created for the motor control board are in Appendix C - Schematic. See Figure 55 and Figure 56.
Description
Pad Size / shape
Through-hole Dia.
Trace Width
+5V
62 mil - round
35/52 mil
20 - 30 mil
GND
62 mil - square
35/52 mil
20 - 30 mil
+12V
62 mil - round
35/52 mil
30 - 60 mil
12V_GND
62 mil - square
35/52 mil
30 - 60 mil
Address/Data Lines
--
--
10 - 15 mil
Terminal Block
75 mil - round
52 mil
--
DIP throughhole
62 mil - round
35 mil
--
Via
40 mil - round
28 mil
--
The technology that was used for printing the circuit boards has some limitations. To keep costs at a minimum, some sacrifices are made with respect to the component density allowed on the PCB’s. The trace widths and the number of routing layers limit the component density of the boards.
The number of layers available is limited to two routing layers. More routing layers require a change in technology, and an associated price increase for getting the PCB’s printed.
The standard pad and traces sizes are listed below, in thousandths of an inch (mils). In general, through holes should be at least 5 mils bigger than the pins that go through them, and should have a minimum 15 mil annular ring around the outside diameter of the pad. Drill sizes are also chosen depending on the vendor; often a vendor will have a list of standard drill sizes that do not cost anything extra to use, and an additional list of the other available drill sizes which are "non-standard", and cost extra to use.
The through hole sizes are important to match with the PCB manufacturer. The sizes in the table match drill sizes that are available at no extra charge from the vendor we used. The size and shape of the pads and traces does not affect the cost of the board.
5.2 Layout Spacing Conventions
Track spacing should be set at ³ 10 mils for all obstacles, including pads and traces. The standard grid size for laying out components is 100 mils, with ³ 300 mils between components. 300 mil spacing allows enough space for a data bus to pass between components with room for vias.
The routing grid should be set to 10 mils, with off-grid routing enabled. This allows traces to pass directly through the midpoint of two pads without violating the design rule check.
There are several different types of noise, but the most common are EMI (electromagnetic interference), and noise caused by inductive loads such as motors and relays. The presence of noise in an electronic circuit can create fault conditions of varying severity. In the worst case, noise problems can cause catastrophic (or unrecoverable) failure of an electronic circuit. It can cause microprocessors to reset unexpectedly, analog measurements to fail, and erroneous signals to trigger. The topic of noise cancellation techniques is broad and poorly defined, with very little literature existing on the subject. It is rarely taken into account when PCB’s are developed. Usually, noise problems are only considered when the circuit under development is not working as expected.
Noise problems are most likely to occur in very low current signals with high impedance. Because impedance increases with frequency, noise problems and susceptibility increase as the frequency of signal lines increase. Route these signal lines with care, and keep them away from noise sources such as relays or fast switching devices. Always treat clock signals with care, as they are a large source of emitted noise. If possible, route sensitive traces perpendicular to traces that are noise sources, to minimize any coupling effects. 45-degree turns in the traces are better than 90 degree turns, because they minimize the inductive impedance of the trace during high frequency switching.
Loops occur when a complete circuit with relatively low impedance encloses a large surface area. The area inside the loop induces a magnetic field that can affect all devices within the loop. Loops can be difficult to identify, because very often they have multiple nodes. When checking for loops, the designer should keep in mind the return path for the current that flows in each signal line. By minimizing the surface area inside the loop containing the signal line and its return path, EMI emittance can be minimized. Long trace lengths are also highly susceptible to EMI, because they act like an antenna. By placing components that are connected to each other as close to one another as possible, trace lengths are minimized and the antenna effect reduced.
Devices that share a common trace may interfere with one another. This is often seen in analog data measurements, when the same ground line that is used in other devices is used as an analog ground reference. As these other devices switch on and off, the amount of current going through the common trace keeps changing. As the amount of current increases, the natural impedance of the copper trace will cause a voltage drop that can be a significant error in measurement systems. This can be avoided by routing separate traces for sensitive devices, or increasing the trace width of any common signals. Impedance is reduced proportionally with the width of the traces. Power and ground lines that must be shared between devices are routed with a thicker trace width than signal lines.
Decoupling capacitors should be used at each device to minimize the impedance of the return path for supply current. 0.1 m F is usually sufficient for decoupling purposes. They are connected across the power connector pins of the device they are protecting with the shortest, widest leads possible for the board design. Note that if you manually route the decoupling capacitor traces, you will need to lock these traces down before beginning an auto-route. Otherwise, the routing algorithm may attempt to shove the capacitor routes out of the way to optimize another trace path. If this occurs, the decoupling capacitor will not function properly.
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page. Last updated: April 20th,
1997